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Electronics & Semiconductors
MassRobotics Startups Get a Look Inside ADI's Robotics Engineering Hub
MassRobotics founders spent a day with Analog Devices' Emerging Tech Hub, learning how a large chip supplier's teams can support robotics st...
Flash Memory Compute Could Bring Adaptive AI to Subwatt Edge Devices
SST’s memBrain performs neural network calculations inside flash memory; AnalogAI aims to pair it with on-device adaptation at one watt or l...
ASIC Tapeout Readiness: The Gaps That Hide Between Teams
Most last-minute ASIC tapeout problems come from handoffs, not hard engineering. Stale waivers, drifted UPF files and unrerun ECO reports ar...
UGREEN HomeAgent HA100: NAS, Camera Recorder and Local AI on One Platform
UGREEN's HA100 combines a NAS, camera recorder and local AI assistant on an RK3588 board. It drew 28W at idle in testing, but the software s...
SignOff Semiconductors Provides Laptops to Madikeri College Students
SignOff Semiconductors and Belakoo Trust distributed laptops to students at a Madikeri college to support access to digital learning resourc...
Haptics Gets a Shared Protocol and a Palm-Sized Drive Module
TITAN Haptics' VH Module is the first product to implement the Universal Haptics Protocol 1.0, pairing audio-to-haptics with a primitives-ba...
Parrot OS on Raspberry Pi: Where It Fits Next to Kali
Parrot OS is a Debian-based distro with a privacy-leaning toolset that runs on Raspberry Pi 3B, 4B, 400 and 5. Here's how it differs from Ka...
Wirepas RF Mesh Reaches 700,000 Smart Meters in Himachal Pradesh's Mountain Terrain
Wirepas says its RF mesh now runs inside 7,02,046 smart meters in Himachal Pradesh, where sparse valley coverage and dense hill towns pose o...
Synaptics SR200 Pairs Torq and Google's Open Coral NPU for Battery-Powered Edge AI
Synaptics' SR200 xMCU series combines its Torq T2 NPU with Google Research's open-source RISC-V Coral NPU for low-power edge AI in wearables...
Moving Robotics Prototypes Into Production With ADI's Emerging Tech Hub
ADI's Emerging Tech Hub pairs robotics startups with engineers, prototyping labs and sourcing expertise as designs move from prototype to pr...
Automated Redundant Via Insertion Targets Advanced-Node Resistance and Reliability
Signoff-aware via insertion can lower interconnect resistance and improve current sharing by moving reliability checks into implementation.
Building Flexibility Into AI Infrastructure From the Start
Training and inference stress hardware in different ways, so architects are mixing memory, chiplet and interconnect choices. Open standards...
AMBA C2C Extends Chiplet Connectivity Across AXI and CHI
AMBA C2C is being developed to carry AXI and CHI traffic across chiplets, with protocol subsets and transport separation aimed at scaling co...
Co-Packaged Optics in a 3 kW AI Package Requires Liquid Cooling
A joint simulation found air cooling missed temperature limits, while an impingement cold plate met targets for a package exceeding 3 kW.