Synaptics SR200 Pairs Torq and Google's Open Coral NPU for Battery-Powered Edge AI

The interesting part of this announcement isn't the raw throughput numbers. It's the way Synaptics and Google Research are splitting the AI workload between two different kinds of accelerator, and making one of them open IP that other chip companies can build on. That's a different bet from the usual proprietary NPU, and it's worth unpacking.

Filling the gap between MCUs and application processors

Anyone who has designed a battery-powered product knows the dilemma. Traditional microcontrollers are cheap and frugal with power, but they run out of processing and memory fast once you ask them to do anything resembling machine learning. Application processors can run Linux and handle serious inference, but they bring higher power draw, more memory, and a bill of materials that grows quickly.

Synaptics is positioning its new xMCU class as the middle ground. According to Augustine Nebu Philips, Sr. Director, Strategy & Business Development at Synaptics, the goal is to give designers AP-class AI capability without leaving the MCU power envelope. Whether the silicon delivers that in practice is a question for the benchmarks that follow, but the target is clear.

The first devices in this class are the Synaptics Astra SR200 series. The family includes three pin-compatible members, which matters if you want to scale performance across a product line without redesigning the board:

• SR210: 200 GOPS, aimed at voice and sensing workloads
• SR230: 300 GOPS, aimed at more demanding vision and display systems
• SR250: 400 GOPS, aimed at multimodal applications

Synaptics targets smart glasses, watches, and other wearables, where the combination of always-on sensing and bursts of heavier processing is the norm.

What's inside the SR200

The core is an Arm Cortex-M85 running at up to 800MHz, paired with a lower-power Cortex-M52 that handles less demanding, always-on tasks. That split is the practical heart of the power story. Rather than keeping a fast core spinning for a sensor that only needs polling, the system can push work to the right power domain and let the big core sleep.

Memory is split between on-chip and external resources. The SR200 includes up to 8MB of SRAM, supplemented by high-bandwidth custom DRAM offering up to 256MB. Dedicated vision and graphics subsystems sit alongside optional audio processing from a Cadence Tensilica HiFi 5 DSP, plus hardware-based security and a broad set of communication interfaces. For a part in this power class, that's a dense feature list.

Here's the thing about the SR200 that will matter most to engineers: the AI engine is a two-part subsystem, the Synaptics Torq NPU. It combines Synaptics' own Torq T2 with Google Research's Coral NPU.

Splitting the work between two NPUs

The division of labor is straightforward once you see it. The Torq T2 is tuned for well-understood neural-network operations, especially the multiply-accumulate calculations that dominate convolutional neural networks (CNNs) and Transformers. It's the fixed-function specialist: familiar operators, extremely high efficiency.

The Coral NPU is the flexible one. It's based on the open RISC-V architecture and offers programmable scalar and vector processing. That lets it run operations that dedicated acceleration hardware may not support, which is exactly the situation you hit when a model uses a newer or unusual layer.

Nebu described the routing this way: standard workloads go to the Torq T2's hardware, and newer or less conventional operations fall to the Coral NPU. That's a sensible architecture. It avoids the common trap where a chip is either very fast on yesterday's networks or stuck when the model changes. Whether the compiler partitions graphs cleanly in real models is what I'd want to test before committing a design.

Why the open IP angle matters

This is where the collaboration gets more interesting than a typical chip launch. Google Research is making the Coral NPU architecture available as open-source intellectual property, not as a closed core under a complicated license. Other semiconductor companies can integrate it into their own SoCs and modify or extend it to suit their requirements.

Billy Rutledge, Director of Edge AI Research at Google, pointed to a problem most embedded developers have lived with. Every proprietary NPU comes with its own toolchain, operator coverage, and quirks. A model that behaves on one chip can take real effort to port to the next, and the internals of vendor tools are often opaque. When something goes wrong, you're debugging a black box.

The response is a shared foundation. The Coral NPU is designed around open standards including RISC-V, and Synaptics' open-source Torq compiler and runtime build on technologies such as MLIR and IREE. The stated aim is a more consistent development environment, so models can move between compatible platforms without starting over each time.

Rutledge, who previously spent many years working on Android, draws a direct comparison. The idea is to encourage an ecosystem in which developers and chip companies build on a common base rather than each maintaining a private stack. Open-source IP doesn't guarantee that outcome, but it removes one of the main obstacles to it.

Synaptics has been working this way for a while. It was the first commercial adopter and integrator of Google's Coral NPU IP, putting the first-generation architecture into its Astra SL family in 2025. The SR200 series moves to the second-generation Coral NPU, which adds SIMD vector processing to improve performance and energy efficiency.

Coralboards and the path to production

Silicon needs somewhere to be tested, so the two companies have created a family of development platforms called the Coralboard. The first member, the Coralboard SL, is built on the Astra SL2619 processor. It has dual Arm Cortex-A55 cores and a 1 TOPS NPU subsystem combining Synaptics' Torq T1 with Google's first-generation Coral NPU. After an initial limited release, it's now generally available through DigiKey.

The Coralboard SR is based on the new SR250, with its Cortex-M85 and Cortex-M52 processors and 400 GOPS Torq/Coral NPU subsystem. Samples are being demonstrated at Synaptics Tech Day 2026, and broader availability is anticipated in the first half of 2027.

Meet the Coralboard (Source: Synaptics)

Both boards expose interfaces for cameras, displays, sensors, and other peripherals, and they share the same open-source development environment. The ambition is to make edge AI experimentation feel about as approachable as an Arduino or Raspberry Pi project. That's a high bar, but the expansion of the toolchain is what makes it plausible.

The boards also reveal a third company. The Coralboard design incorporates a production-grade system-on-module (SoM) from GRINN, an embedded hardware specialist based in Poland. Per Nebu, the SoM comes with essential supporting components such as memory and storage already included.

That gives a staged route from prototype to product. You can start on the Coralboard, move to the GRINN SoM when you need a compact module in your own product, or eventually lay the Synaptics processor directly onto your own board. For teams that have been burned by long bring-up cycles, that flexibility is the selling point.

Where this goes next

The application list is the expected one: smart glasses that recognize objects and interpret their surroundings, wearables that respond to spoken instructions without round-tripping to the cloud, industrial sensors that flag developing faults, and robots that adjust to their environment. The more useful question is which of these can run inside a power budget a wearable can actually tolerate, and that will depend on real duty cycles, not peak GOPS.

Billy said Google Research has further enhancements to the Coral NPU architecture in the pipeline, and Synaptics plans to keep introducing processors and development boards as the technology matures. Watch two things over the next year: how far the open toolchain actually carries models across vendors, and whether other chip companies adopt the Coral NPU IP. If both happen, the value of the Coral architecture grows well beyond this one Synaptics family.

For now, the SR200 is worth a close look if you're designing wearables or sensor nodes that have outgrown a conventional MCU but can't afford an application processor's power budget. Get a Coralboard SL on the bench, check how your model partitions between the two NPUs, and decide from there.